;/***************************************/;
;/* Example Form For : CP-JR08GP32 V1,2 */;
;/* Controller       : 68H(R)C908GP32   */;
;/* Assembler        : CASM08Z.EXE      */;
;/* File Name        : GP32FORM.SRC     */;
;/* Write By         : Eakachai Makarn  */;
;/* File Update      : 15-Nov-2002      */;
;/***************************************/;
;/* Editor Standard Form For HC08GP32   */;
;/***************************************/;
;
;/***************************************/;
;/* Start of IO Register Address Equate */;
;/* For Processor : MC68H(R)C908GP32    */;
;/***************************************/;
PTA         EQU     $0000                   ; Port-A Data Register
PTB         EQU     $0001                   ; Port-B Data Register
PTC         EQU     $0002                   ; Port-C Data Register
PTD         EQU     $0003                   ; Port-D Data Regsiter
DDRA        EQU     $0004                   ; Port-A Direction Register
DDRB        EQU     $0005                   ; Port-B Direction Register
DDRC        EQU     $0006                   ; Port-C Direction Register
DDRD        EQU     $0007                   ; Port-D Direction Register
PTE         EQU     $0008                   ; Port-E Data Regsiter
DDRE        EQU     $000C                   ; Port-E Direction Register
PTAPUE      EQU     $000D                   ; Port-A Pull-Up Enable Register
PTCPUE      EQU     $000E                   ; Port-C Pull-Up Enable Register
PTDPUE      EQU     $000F                   ; Port-D Pull-Up Enable Register
;
;/* Bit of SPI Control Register
;/* SPCR Bit Address Equate
SPCR        EQU     $0010                   ; SPI Control Register
SPRIE       EQU     $07                     ; R/W
DMAS        EQU     $06                     ; R
SPMSTR      EQU     $05                     ; R/W
CPOL        EQU     $04                     ; R/W
CPHA        EQU     $03                     ; R/W
SPWOM       EQU     $02                     ; R/W
SPE         EQU     $01                     ; R/W
SPTIE       EQU     $00                     ; R/W
;
;/* Bit of SPI Status and Control
;/* SPSCR Bit Address Equate
SPSCR       EQU     $0011                   ; SPI Status and Control Register
SPRF        EQU     $07                     ; R
ERRIE       EQU     $06                     ; R/W
OVRF        EQU     $05                     ; R
MODF        EQU     $04                     ; R
SPTE        EQU     $03                     ; R
MODFEN      EQU     $02                     ; R/W
SPR1        EQU     $01                     ; R/W
SPR0        EQU     $00                     ; R/W
;
SPDR        EQU     $0012                   ; SPI Data Register
;
;/* Bit of SCI Control Register1
;/* SCC1 Bit Address Equate
SCC1        EQU     $0013                   ; SCI Control Register1
LOOPS       EQU     $07                     ; R/W
ENSCI       EQU     $06                     ; R/W
TXINV       EQU     $05                     ; R/W
M           EQU     $04                     ; R/W
WAKE        EQU     $03                     ; R/W
ILTY        EQU     $02                     ; R/W
PEN         EQU     $01                     ; R/W
PTY         EQU     $00                     ; R/W
;
;/* Bit of SCI Control Register2
;/* SCC2 Bit Address Equate
SCC2        EQU     $0014                   ; SCI Control Register2
SCTIE       EQU     $07                     ; R/W
TCIE        EQU     $06                     ; R/W
SCRIE       EQU     $05                     ; R/W
ILIE        EQU     $04                     ; R/W
TE          EQU     $03                     ; R/W
RE          EQU     $02                     ; R/W
RWU         EQU     $01                     ; R/W
SBK         EQU     $00                     ; R/W
;
;/* Bit of SCI Control Register3
;/* SCC3 Bit Address Equate
SCC3        EQU     $0015                   ; SCI Control Register3
R8          EQU     $07                     ; R
T8          EQU     $06                     ; R/W
DMARE       EQU     $05                     ; R/W
DMATE       EQU     $04                     ; R/W
ORIE        EQU     $03                     ; R/W
NEIE        EQU     $02                     ; R/W
FEIE        EQU     $01                     ; R/W
PEIE        EQU     $00                     ; R/W
;
;/* Bit Of SCI Status Register1
;/* SCS1 Bit Address Equate
SCS1        EQU     $0016                   ; SCI Status Register1
SCTE        EQU     $07                     ; R
TC          EQU     $06                     ; R
SCRF        EQU     $05                     ; R
IDLE        EQU     $04                     ; R
OR          EQU     $03                     ; R
NF          EQU     $02                     ; R
FE          EQU     $01                     ; R
PE          EQU     $00                     ; R
;
;/* Bit of SCI Status Register2
;/* SCS2 Bit Address Equate
SCS2        EQU     $0017                   ; SCI Status Register2
BKF         EQU     $01                     ; R
RPF         EQU     $00                     ; R
;
SCDR        EQU     $0018                   ; SCI Data Register
;
;/* Bit of SCI Baudrate Register
;/* SCBR Bit Address Equate
SCBR        EQU     $0019                   ; SCI Baudrate Register
SCP1        EQU     $05                     ; R/W
SCP0        EQU     $04                     ; R/W
SCR2        EQU     $02                     ; R/W
SCR1        EQU     $01                     ; R/W
SCR0        EQU     $00                     ; R/W
;
;/* Bit of Keyboard Status & Control
;/* INTKBSCR Bit Address Equate
INTKBSCR    EQU     $001A                   ; Keyboard Status and Control Register
KEYF        EQU     $03                     ; R
ACKK        EQU     $02                     ; W
IMASKK      EQU     $01                     ; R/W
MODEK       EQU     $00                     ; R/W
;
;/* Bit of Keyboard Interrupt Enable
;/* INTKBIER Bit Address Equate
INTKBIER    EQU     $001B                   ; Keyboard Interrupt Enable Register
KBIE7       EQU     $07                     ; R/W
KBIE6       EQU     $06                     ; R/W
KBIE5       EQU     $05                     ; R/W
KBIE4       EQU     $04                     ; R/W
KBIE3       EQU     $03                     ; R/W
KBIE2       EQU     $02                     ; R/W
KBIE1       EQU     $01                     ; R/W
KBIE0       EQU     $00                     ; R/W
;
;/* Bit of Time Base Module Control
;/* TBCR Bit Address Equate
TBCR        EQU     $001C                   ; Time Base Module Control Register
TBIF        EQU     $07                     ; R
TBR2        EQU     $06                     ; R/W
TBR1        EQU     $05                     ; R/W
TBR0        EQU     $04                     ; R/W
TACK        EQU     $03                     ; W
TBIE        EQU     $02                     ; R/W
TBON        EQU     $01                     ; R/W
;
;/* Bit of IRQ Status & Control
;/* INTSCR Bit Address Equate
INTSCR      EQU     $001D                   ; IRQ Status and Control Register
IRQF1       EQU     $03                     ; R
ACK1        EQU     $02                     ; W
IMASK1      EQU     $01                     ; R/W
MODE1       EQU     $00                     ; R/W
;
;/* Bit of Config Register2
;/* CONFIG2 Bit Address Equate
CONFIG2     EQU     $001E                   ; Config Register2
OSCSTOPENB  EQU     $01                     ; R/W
SCIBDSRC    EQU     $00                     ; R/W
;
;/* Bit of Config Register1
;/* CONFIG1 Bit Address Equate
CONFIG1     EQU     $001F                   ; Config Register1
COPRS       EQU     $07                     ; R/W
LVISTOP     EQU     $06                     ; R/W
LVIRSTD     EQU     $05                     ; R/W
LVIPWRD     EQU     $04                     ; R/W
LVI5OR3     EQU     $03                     ; R/W
SSREC       EQU     $02                     ; R/W
STOP        EQU     $01                     ; R/W
COPD        EQU     $00                     ; R/W
;
;/* Bit of Timer Status & Control
;/* TxSC Bit Address Equate
T1SC        EQU     $0020                   ; TIM1 Status & Control Register
T2SC        EQU     $002B                   ; TIM2 Status & Control Register
TOF         EQU     $07                     ; R
TOIE        EQU     $06                     ; R/W
TSTOP       EQU     $05                     ; R/W
TRST        EQU     $04                     ; W
PS2         EQU     $02                     ; R/W
PS1         EQU     $01                     ; R/W
PS0         EQU     $00                     ; R/W
;
;/* Bit of Timer CH0 Status & Control Register
;/* TxSC0 Bit Address Equate
T1SC0       EQU     $0025                   ; TIM1 CH0 Status & Control Register
T2SC0       EQU     $0030                   ; TIM2 CH0 Status & Control Register
CH0F        EQU     $07                     ; R/W
CH0IE       EQU     $06                     ; R/W
MS0B        EQU     $05                     ; R/W
MS0A        EQU     $04                     ; R/W
ELS0B       EQU     $03                     ; R/W
ELS0A       EQU     $02                     ; R/W
TOV0        EQU     $01                     ; R/W
CH0MAX      EQU     $00                     ; R/W
;
;/* Bit of Timer CH1 Status & Control Register
;/* TxSC1 Bit Address Equate
T1SC1       EQU     $0028                   ; TIM1 CH1 Status & Control Register
T2SC1       EQU     $0033                   ; TIM2 CH1 Status & Control Register
CH1F        EQU     $07                     ; R/W
CH1IE       EQU     $06                     ; R/W
MS1A        EQU     $04                     ; R/W
ELS1B       EQU     $03                     ; R/W
ELS1A       EQU     $02                     ; R/W
TOV1        EQU     $01                     ; R/W
CH1MAX      EQU     $00                     ; R/W
;
T1CNTH      EQU     $0021                   ; TIM1 Counter High Register
T1CNTL      EQU     $0022                   ; TIM1 Counter Low Register
T1MODH      EQU     $0023                   ; TIM1 Counter Modulo High Register
T1MODL      EQU     $0024                   ; TIM1 Counter Modulo Low Register
T1CH0H      EQU     $0026                   ; TIM1 CH0 High Register
T1CH0L      EQU     $0027                   ; TIM1 CH0 Low Register
T1CH1H      EQU     $0029                   ; TIM1 CH1 High Register
T1CH1L      EQU     $002A                   ; TIM1 CH1 Low Register
T2CNTH      EQU     $002C                   ; TIM2 Counter High Register
T2CNTL      EQU     $002D                   ; TIM2 Counter Low Register
T2MODH      EQU     $002E                   ; TIM2 Counter Modulo High Register
T2MODL      EQU     $002F                   ; TIM2 Counter Modulo Low Register
T2CH0H      EQU     $0031                   ; TIM2 CH0 High Register
T2CH0L      EQU     $0032                   ; TIM2 CH0 Low Register
T2CH1H      EQU     $0034                   ; TIM2 CH1 High Register
T2CH1L      EQU     $0035                   ; TIM2 CH1 Low Register
;
;/* Bit of PLL Control Register
;/* PCTL Bit Address Equate
PCTL        EQU     $0036                   ; PLL Control Register
PLLIE       EQU     $07                     ; R/W
PLLF        EQU     $06                     ; R
PLLON       EQU     $05                     ; R/W
BCS         EQU     $04                     ; R/W
PRE1        EQU     $03                     ; R/W
PRE0        EQU     $02                     ; R/W
VPR1        EQU     $01                     ; R/W
VPR0        EQU     $00                     ; R/W
;
;/* Bit of PLL Bandwidth Control Register
;/* PBWC Bit Address Equate
PBWC        EQU     $0037                   ; PLL Bandwidth Control Register
AUTO        EQU     $07                     ; R/W
LOCK        EQU     $06                     ; R
ACQ         EQU     $05                     ; R/W
;
;/* Bit of PLL Multiply Select High
;/* PMSH Bit Address Equate
PMSH        EQU     $0038                   ; PLL Multiply Select High Register
MUL11       EQU     $03                     ; R/W
MUL10       EQU     $02                     ; R/W
MUL9        EQU     $01                     ; R/W
MUL8        EQU     $00                     ; R/W
;
;/* Bit of Multiply Select Low
;/* PMSL Bit Address Equate
PMSL        EQU     $0039                   ; PLL Multiply Select Low Register
MUL7        EQU     $07                     ; R/W
MUL6        EQU     $06                     ; R/W
MUL5        EQU     $05                     ; R/W
MUL4        EQU     $04                     ; R/W
MUL3        EQU     $03                     ; R/W
MUL2        EQU     $02                     ; R/W
MUL1        EQU     $01                     ; R/W
MUL0        EQU     $00                     ; R/W
;
;/* Bit of PLL VCO Select Range
;/* PMRS Bit Address Equate
PMRS        EQU     $003A                   ; PLL VCO Select Range Register
VRS7        EQU     $07                     ; R/W
VRS6        EQU     $06                     ; R/W
VRS5        EQU     $05                     ; R/W
VRS4        EQU     $04                     ; R/W
VRS3        EQU     $03                     ; R/W
VRS2        EQU     $02                     ; R/W
VRS1        EQU     $01                     ; R/W
VRS0        EQU     $00                     ; R/W
;
;/* Bit of PLL Reference Divider Select
;/* PMDS Bit Address Equate
PMDS        EQU     $003B                   ; PLL Reference Divider Select Register
RDS3        EQU     $03                     ; R/W
RDS2        EQU     $02                     ; R/W
RDS1        EQU     $01                     ; R/W
RDS0        EQU     $00                     ; R/W
;
;/* Bit of ADC Status & Control
;/* ADSCR Bit Address Equate
ADSCR       EQU     $003C                   ; ADC Status & Control Register
COCO        EQU     $07                     ; R/W
AIEN        EQU     $06                     ; R/W
ADCO        EQU     $05                     ; R/W
ADCH4       EQU     $04                     ; R/W
ADCH3       EQU     $03                     ; R/W
ADCH2       EQU     $02                     ; R/W
ADCH1       EQU     $01                     ; R/W
ADCH0       EQU     $00                     ; R/W
;
ADR         EQU     $003D                   ; ADC Data Register
;
;/* Bit of ADC Clock Register
;/* ADCLK Bit Address Equate
ADCLK       EQU     $003E                   ; ADC Clock Register
ADIV2       EQU     $07                     ; R/W
ADIV1       EQU     $06                     ; R/W
ADIV0       EQU     $05                     ; R/W
ADICLK      EQU     $04                     ; R/W
;
;/* Bit of SIM Break Status Register
;/* SBSR Bit Address Equate
SBSR        EQU     $FE00                   ; SIM Break Status Register
SBSW        EQU     $01                     ; R
;
;/* Bit of SIM Reset Status Register
;/* SRSR Bit Address Equate
SRSR        EQU     $FE01                   ; SIM Reset Status Register
POR         EQU     $07                     ; R/W
PIN         EQU     $06                     ; R/W
COP         EQU     $05                     ; R/W
ILOP        EQU     $04                     ; R/W
ILAD        EQU     $03                     ; R/W
MODRST      EQU     $02                     ; R/W
LVI         EQU     $01                     ; R/W
;
SUBAR       EQU     $FE02                   ; SIM Upper Byte Address Register
;
;/* Bit of SIM Break Flag Control
;/* SBFCR Bit Address Equate
SBFCR       EQU     $FE03                   ; SIM Break Flag Control Register
BCFE        EQU     $07                     ; R/W
;
;/* Bit of Interrupt Status Register1
;/* INT1 Bit Address Equate
INT1        EQU     $FE04                   ; Interrupt Status1 Register
IF6         EQU     $07                     ; R
IF5         EQU     $06                     ; R
IF4         EQU     $05                     ; R
IF3         EQU     $04                     ; R
IF2         EQU     $03                     ; R
IF1         EQU     $02                     ; R
;
;/* Bit of Interrupt Status Register2
;/* INT2 Bit Address Equate
INT2        EQU     $FE05                   ; Interrupt Status2 Register
IF14        EQU     $07                     ; R
IF13        EQU     $06                     ; R
IF12        EQU     $05                     ; R
IF11        EQU     $04                     ; R
IF10        EQU     $03                     ; R
IF9         EQU     $02                     ; R
IF8         EQU     $01                     ; R
IF7         EQU     $00                     ; R
;
;/* Bit of Interrupt Status Register3
;/* INT3 Bit Address Equate Equate
INT3        EQU     $FE06                   ; Interrupt Status3 Register
IF16        EQU     $01                     ; R
IF15        EQU     $00                     ; R
;
;/* Bit of Flash Control Register
;/* FLCR Bit Address Equate
FLCR        EQU     $FE08                   ; Flash Control Register
HVEN        EQU     $03                     ; R/W
MASS        EQU     $02                     ; R/W
ERASE       EQU     $01                     ; R/W
PGM         EQU     $00                     ; R/W
;
BRKH        EQU     $FE09                   ; Break Address High Register
BRKL        EQU     $FE0A                   ; Break Address Low Register
;
;/* Bit of Break Status & Control Register
;/* BRKSCR Bit Address Equate
BRKSCR      EQU     $FE0B                   ; Break Status and Control Register
BRKE        EQU     $07                     ; R/W
BRKA        EQU     $06                     ; R/W
;
;/* Bit of LVI Status Register
;/* LVISR Bit Address Equate
LVISR       EQU     $FE0C                   ; LVI Status Register
LVIOUT      EQU     $07                     ; R/W
;
;/* Bit of Flash Block Protect
;/* FLBPR Bit Address Equate
FLBPR       EQU     $FF7E                   ; Flash Block Protect Register
BPR7        EQU     $07                     ; R/W
BPR6        EQU     $06                     ; R/W
BPR5        EQU     $05                     ; R/W
BPR4        EQU     $04                     ; R/W
BPR3        EQU     $03                     ; R/W
BPR2        EQU     $02                     ; R/W
BPR1        EQU     $01                     ; R/W
BPR0        EQU     $00                     ; R/W
COPCTL      EQU     $FFFF                   ; Reset COP Register
;/*************************************/;
;/* End of IO Register Address Equate */;
;/* For Processor : MC68H(R)C908GP32  */;
;/*************************************/;
;
;/*************************************/;
;/* Start of Equate Hardware I/O Bit  */;
;/* For Standard Board : CP-JR08GP32  */;
;/*************************************/;
;
;/****************************/;
;/* LCD Interface With 4-Bit */;
;/* EN-LCD = PTC2            */;
;/* RS-LCD = PTC4            */;
;/* D4-LCD = PTD0            */;
;/* D5-LCD = PTD1            */;
;/* D6-LCD = PTD2            */;
;/* D7-LCD = PTD3            */;
;/* RW,D0..D3 of LCD = GND   */;
;/****************************/;
DATA_LCD    EQU     PTD                     ; PORTD = Data LCD
DLCD_DIR    EQU     DDRD                    ; Direction For Data LCD
CTRL_LCD    EQU     PTC                     ; PORTC = Control LCD
CLCD_DIR    EQU     DDRC                    ; Direction For Control LCD
EN_LCD      EQU     02H                     ; PTC2
RS_LCD      EQU     04H                     ; PTC4
D4_LCD      EQU     00H                     ; PTD0
D5_LCD      EQU     01H                     ; PTD1
D6_LCD      EQU     02H                     ; PTD2
D7_LCD      EQU     03H                     ; PTD3
;
;/****************************/;
;/* I2C I/O Device Interface */;
;/* I2C Signal Select Jumper */;
;/*     - SDA = PTC0 or PTB6 */;
;/*     - SCL = PTC1 or PTB7 */;
;/* This Equate to PTC0,PTC1 */;
;/****************************/;
PORT_I2C    EQU     PTC                     ; PORTC = I2C Signal
PDIR_I2C    EQU     DDRC                    ; Direction Read/Write
PULL_I2C    EQU     PTCPUE                  ; Pull-Up Enable
I2C_SDA     EQU     $00                     ; PTC0 = SDA
I2C_SCL     EQU     $01                     ; PTC1 = SCL
;
;/****************************/;
;/* RS-485 Direction Control */;
;/****************************/;
PORT_485    EQU     PTC                     ; PORTC = RS485 Direction Signal Control
PDIR_485    EQU     DDRC                    ; Direction Bit Control (Setup = Output)
POUT_485    EQU     $03                     ; PTC3 = RS485 Bit Signal Direction
;
;/****************************/;
;/* Matrix Keyboard Interface*/;
;/****************************/;
PORT_KEY    EQU     PTA                     ; PORTA = Keyboard Signal
PDIR_KEY    EQU     DDRA                    ; Direction In/Out
PULL_KEY    EQU     PTAPUE                  ; Pull-Up Enable
ROW0_KEY    EQU     $00                     ; PTA0 = Row0
ROW1_KEY    EQU     $01                     ; PTA1 = Row1
ROW2_KEY    EQU     $02                     ; PTA2 = Row2
ROW3_KEY    EQU     $03                     ; PTA3 = Row3
COL0_KEY    EQU     $04                     ; PTA4 = Column0
COL1_KEY    EQU     $05                     ; PTA5 = Column1
COL2_KEY    EQU     $06                     ; PAT6 = Column2
COL3_KEY    EQU     $07                     ; PTA7 = Column3 (Jumper Select = 4x4)
;
;/****************************/;
;/* Speaker or Buzzer Control*/;
;/*   (Jumper Select = 4x3)  */;
;/****************************/;
PORT_SPK    EQU     PTA                     ; PORTA = Speaker Signal Control
PDIR_SPK    EQU     DDRA                    ; Direction Bit Control (Setup = Output)
POUT_SPK    EQU     $07                     ; PTA7 = Speaker Bit Signal
;
;/*****************/;
;/* Relay Control */;
;/*****************/;
PORT_REL    EQU     PTB                     ; PORTB = Relay Signal Control
PDIR_REL    EQU     DDRB                    ; Direction Bit Control (Setup = Output)
POUT_REL    EQU     $07                     ; PTB7 = Speaker Bit Signal
;
;/****************************/;
;/* Magnetic Card Interface  */;
;/* Data Magnetic  = PTD4    */;
;/* Clock Magnetic = PTD5    */;
;/****************************/;
PORT_MAG    EQU     PTD                     ; PORTD = Magnetic Card Reader Signal
PDIR_MAG    EQU     DDRD                    ; Direction Read/Write
PULL_MAG    EQU     PTDPUE                  ; Pull-Up Enable
MAG_DATA    EQU     $04                     ; PTD4 = Data
MAG_CLK     EQU     $05                     ; PTD5 = Clock
;
;/************************/;
;/* RTC PCF8583 Register */;
;/************************/;
CTRL_RTC    EQU     $00                     ; Control/Status RTC
SEC_100     EQU     $01                     ; 1/100 of Second (00-99)
SECOND      EQU     $02                     ; Second (00-59)
MINUTE      EQU     $03                     ; Minute (00-59)
HOUR        EQU     $04                     ; Hour   (00-23) / 01-12(AM/PM)
YEAR_DATE   EQU     $05                     ; Year   (00-03) / Date(01-28,29,30,31)
WEEK_MONTH  EQU     $06                     ; Week   (00-06) / Month (01-12)
TIMER_RTC   EQU     $07                     ; Timer  (00-99)
;
ALARM_CTL   EQU     $08                     ; Alarm Control/Status
ALARM_SEC0  EQU     $09                     ; Alarm 1/100 Second
ALARM_SEC   EQU     $0A                     ; Alarm Second
ALARM_MIN   EQU     $0B                     ; Alarm Minute
ALARM_HOUR  EQU     $0C                     ; Alarm Hour
ALARM_DATE  EQU     $0D                     ; Alarm Date
ALARM_MONTH EQU     $0E                     ; Alarm Month
ALARM_TIMER EQU     $0F                     ; Alarm Timer
;
;/* Internal RTC RAM Address */;
RAM_START   EQU     $10                     ; $10..$FF = 240 Byte RAM
RAM_END     EQU     $FF
;
;/*************************************/;
;/*  End of Equate Hardware I/O Bit   */;
;/* For Standard Board : CP-JR08GP32  */;
;/*************************************/;

            ;/*************************/;
            ;/* RAM Buffer Start Here */;
            ;/* $0040-$023F = 512Byte */;
            ;/*************************/;
            ORG     $0040                   ; RAM Buffer : $0040-$023F
BUFFER1     DS      1
BUFFER2     DS      1


            ;/*******************************/;
            ;/* Usercode Program Start Here */;
            ;/* $8000-$FDFF = User Code     */;
            ;/* $FFDC-$FFFF = User Vector   */;
            ;/*******************************/;
            ORG     $8000                   ; Start Main (68HC908GP32 : $8000-$FDFF)
$BASE       10T                             ; Defualt System Number to Decimal
RESET:      BSET    0,CONFIG1               ; Disable COP Watch-Dog
            BSET    0,CONFIG2               ; SCI Baudrate Select From Internal Clock Bus
            LDHX    #$0240                  ; Last Address RAM = Stack (H:X=$0240)
            TXS                             ; [(H:X-1) -> SP] (SP = $023F)
            ;
            ;/*******************************/;
            ;/* Initial  PLL  For Clock Bus */;
            ;/* External X-TAL = 32.768 KHz */;
            ;/* Clock Bus Freq = 7.3728 MHz */;
            ;/*******************************/;
            ;
            BCLR    BCS,PCTL                ; Select External Clock
            BCLR    PLLON,PCTL              ; Turn-off PLL
            BCLR    PRE1,PCTL               ; P = 0
            BCLR    PRE0,PCTL
            BSET    VPR1,PCTL               ; E = 2
            BCLR    VPR0,PCTL
            MOV     #$01,PMDS               ; R = $01
            MOV     #$03,PMSH               ; N = $0384
            MOV     #$84,PMSL
            MOV     #$C0,PMRS               ; L = $C0
            LDA     PCTL                    ; Clear Status
            BSET    AUTO,PBWC               ; Auto Bandwidth Control
            BSET    PLLON,PCTL              ; Turn-on PLL
            BRCLR   LOCK,PBWC,*             ; Wait For PLL Lock Complete
            BSET    BCS,PCTL                ; Select PLL Output as Base Clock
            ;
            ;/*******************************/;
            ; Other User Program Start Here */;
            ;/*******************************/;



            ;/**************************/;
            ;/* User Vector Start Here */;
            ;/*     2 Byte / Vector    */;
            ;/**************************/;
            ;/* ORG $Vector  Address   */;
            ;/* DW  $Routine Address   */;
            ;/**************************/;
            ;
            ORG     $FFDC                   ; TBM Vector
            DW      RESET
            ;
            ORG     $FFDE                   ; ADC Vector
            DW      RESET
            ;
            ORG     $FFE0                   ; KBI Vector
            DW      RESET
            ;
            ORG     $FFE2                   ; SCI TX Vector
            DW      RESET
            ;
            ORG     $FFE4                   ; SCI RX Vector
            DW      RESET
            ;
            ORG     $FFE6                   ; SCI Error Vector
            DW      RESET
            ;
            ORG     $FFE8                   ; SPI TX Vector
            DW      RESET
            ;
            ORG     $FFEA                   ; SPI RX Vector
            DW      RESET
            ;
            ORG     $FFEC                   ; TIM2 Overflow Vector
            DW      RESET
            ;
            ORG     $FFEE                   ; TIM2 CH1 Vector
            DW      RESET
            ;
            ORG     $FFF0                   ; TIM2 CH0 Vector
            DW      RESET
            ;
            ORG     $FFF2                   ; TIM1 Overflow Vector
            DW      RESET
            ;
            ORG     $FFF4                   ; TIM1 CH1 Vector
            DW      RESET
            ;
            ORG     $FFF6                   ; TIM1 CH0 Vector
            DW      RESET
            ;
            ORG     $FFF8                   ; PLL Vector
            DW      RESET
            ;
            ORG     $FFFA                   ; IRQ Vector
            DW      RESET
            ;
            ORG     $FFFC                   ; SWI Vector
            DW      RESET
            ;
            ORG     $FFFE                   ; RST Vector
            DW      RESET

            END
